/home/scole/Downloads/gcc6//GENERIC.SKI/uvm_glue.o:     file format elf64-ia64-little


Disassembly of section .text:

0000000000000000 <uarea_poolpage_free>:
   0:	09 80 10 08 80 05 	[MMI]       alloc r16=ar.pfs,4,4,0
   6:	00 c2 83 00 42 e0 	            adds r32=120,r32
   c:	01 08 00 90       	            addl r15=0,r1;;
  10:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
  16:	e0 00 80 30 20 60 	            ld8 r14=[r32]
  1c:	14 00 00 90       	            mov r35=1
  20:	0b 78 00 1e 18 10 	[MMI]       ld8 r15=[r15];;
  26:	e0 80 38 00 42 00 	            adds r14=16,r14
  2c:	00 00 04 00       	            nop.i 0x0;;
  30:	09 00 01 1e 18 10 	[MMI]       ld8 r32=[r15]
  36:	20 02 38 20 20 00 	            ld4 r34=[r14]
  3c:	00 00 04 00       	            nop.i 0x0;;
  40:	11 10 10 00 80 05 	[MIB]       alloc r2=ar.pfs,4,0,0
  46:	00 00 00 02 00 00 	            nop.i 0x0
  4c:	08 00 00 40       	            br.many 40 <uarea_poolpage_free+0x40>;;
  50:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
  56:	00 00 00 00 00 00 	            break.f 0x0
  5c:	00 00 04 00       	            nop.i 0x0;;
  60:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
  66:	00 00 00 02 00 00 	            nop.m 0x0
  6c:	00 00 04 00       	            nop.i 0x0
  70:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
  76:	00 00 00 02 00 00 	            nop.m 0x0
  7c:	00 00 04 00       	            nop.i 0x0

0000000000000080 <uarea_poolpage_alloc>:
  80:	18 80 10 08 80 05 	[MMB]       alloc r16=ar.pfs,4,4,0
  86:	00 c2 83 00 42 00 	            adds r32=120,r32
  8c:	00 00 00 20       	            nop.b 0x0
  90:	09 78 00 02 00 24 	[MMI]       addl r15=0,r1
  96:	00 00 00 02 00 e0 	            nop.m 0x0
  9c:	00 08 19 50       	            tbit.z p7,p6=r33,0;;
  a0:	08 70 00 40 18 10 	[MMI]       ld8 r14=[r32]
  a6:	00 00 00 02 00 40 	            nop.m 0x0
  ac:	04 00 00 84       	            mov r34=r0
  b0:	05 78 00 1e 18 90 	[MLX]       ld8 r15=[r15]
  b6:	00 00 00 00 00 63 	      (p06) movl r35=0x800001;;
  bc:	14 00 00 60 
  c0:	05 70 40 1c 00 61 	[MLX]       adds r14=16,r14
  c6:	00 00 00 00 80 63 	      (p07) movl r35=0x600001;;
  cc:	14 10 00 60 
  d0:	09 00 01 1e 18 10 	[MMI]       ld8 r32=[r15]
  d6:	10 02 38 20 20 00 	            ld4 r33=[r14]
  dc:	00 00 04 00       	            nop.i 0x0;;
  e0:	11 10 10 00 80 05 	[MIB]       alloc r2=ar.pfs,4,0,0
  e6:	00 00 00 02 00 00 	            nop.i 0x0
  ec:	08 00 00 40       	            br.many e0 <uarea_poolpage_alloc+0x60>;;
  f0:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
  f6:	00 00 00 00 00 00 	            break.f 0x0
  fc:	00 00 04 00       	            nop.i 0x0;;

0000000000000100 <uvm_kernacc>:
 100:	09 30 31 10 80 05 	[MMI]       alloc r38=ar.pfs,12,8,0
 106:	30 02 04 00 48 a0 	            addl r35=0,r1
 10c:	04 00 c4 00       	            mov r37=b0;;
 110:	03 18 01 46 18 10 	[MII]       ld8 r35=[r35]
 116:	40 02 f0 01 4f 00 	            mov r36=-16384;;
 11c:	44 02 31 80       	            and r32=r36,r32;;
 120:	11 40 01 46 18 10 	[MIB]       ld8 r40=[r35]
 126:	00 00 00 02 00 00 	            nop.i 0x0
 12c:	08 00 00 50       	            br.call.sptk.many b0=120 <uvm_kernacc+0x20>;;
 130:	08 70 fc 01 7f 24 	[MMI]       mov r14=16383
 136:	b0 02 88 00 42 20 	            mov r43=r34
 13c:	05 00 01 84       	            mov r41=r32
 140:	0b 40 01 46 18 10 	[MMI]       ld8 r40=[r35];;
 146:	10 0a 39 00 40 00 	            add r33=r33,r14
 14c:	00 00 04 00       	            nop.i 0x0;;
 150:	09 00 00 00 01 00 	[MMI]       nop.m 0x0
 156:	a0 0a 81 00 40 00 	            add r42=r33,r32
 15c:	00 00 04 00       	            nop.i 0x0;;
 160:	11 50 91 54 0c 20 	[MIB]       and r42=r36,r42
 166:	00 00 00 02 00 00 	            nop.i 0x0
 16c:	08 00 00 50       	            br.call.sptk.many b0=160 <uvm_kernacc+0x60>;;
 170:	11 40 01 46 18 10 	[MIB]       ld8 r40=[r35]
 176:	40 02 20 00 42 00 	            mov r36=r8
 17c:	08 00 00 50       	            br.call.sptk.many b0=170 <uvm_kernacc+0x70>;;
 180:	09 40 00 48 00 21 	[MMI]       mov r8=r36
 186:	00 00 00 02 00 00 	            nop.m 0x0
 18c:	60 02 aa 00       	            mov.i ar.pfs=r38;;
 190:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 196:	00 28 05 80 03 80 	            mov b0=r37
 19c:	08 00 84 00       	            br.ret.sptk.many b0;;
 1a0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 1a6:	00 00 00 02 00 00 	            nop.m 0x0
 1ac:	00 00 04 00       	            nop.i 0x0
 1b0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 1b6:	00 00 00 02 00 00 	            nop.m 0x0
 1bc:	00 00 04 00       	            nop.i 0x0

00000000000001c0 <uvm_vslock>:
 1c0:	0b 80 14 0a 80 05 	[MMI]       alloc r16=ar.pfs,5,5,0;;
 1c6:	e0 f8 03 fe 48 80 	            mov r14=16383
 1cc:	04 00 00 84       	            mov r36=r0;;
 1d0:	09 10 89 1c 00 20 	[MMI]       add r34=r34,r14
 1d6:	00 00 00 02 00 c0 	            nop.m 0x0
 1dc:	01 e0 03 9e       	            mov r14=-16384;;
 1e0:	03 10 89 42 00 20 	[MII]       add r34=r34,r33
 1e6:	10 72 84 18 40 40 	            and r33=r14,r33;;
 1ec:	e4 10 31 80       	            and r34=r14,r34;;
 1f0:	11 10 14 00 80 05 	[MIB]       alloc r2=ar.pfs,5,0,0
 1f6:	00 00 00 02 00 00 	            nop.i 0x0
 1fc:	08 00 00 40       	            br.many 1f0 <uvm_vslock+0x30>;;
 200:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 206:	00 00 00 00 00 00 	            break.f 0x0
 20c:	00 00 04 00       	            nop.i 0x0;;
 210:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 216:	00 00 00 02 00 00 	            nop.m 0x0
 21c:	00 00 04 00       	            nop.i 0x0
 220:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 226:	00 00 00 02 00 00 	            nop.m 0x0
 22c:	00 00 04 00       	            nop.i 0x0
 230:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 236:	00 00 00 02 00 00 	            nop.m 0x0
 23c:	00 00 04 00       	            nop.i 0x0

0000000000000240 <uvm_vsunlock>:
 240:	0b 70 fc 01 7f 24 	[MMI]       mov r14=16383;;
 246:	20 12 39 00 40 c0 	            add r34=r34,r14
 24c:	01 e0 03 9e       	            mov r14=-16384;;
 250:	03 10 89 42 00 20 	[MII]       add r34=r34,r33
 256:	10 72 84 18 40 40 	            and r33=r14,r33;;
 25c:	e4 10 31 80       	            and r34=r14,r34;;
 260:	11 10 0c 00 80 05 	[MIB]       alloc r2=ar.pfs,3,0,0
 266:	00 00 00 02 00 00 	            nop.i 0x0
 26c:	08 00 00 40       	            br.many 260 <uvm_vsunlock+0x20>;;
 270:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 276:	00 00 00 00 00 00 	            break.f 0x0
 27c:	00 00 04 00       	            nop.i 0x0;;

0000000000000280 <uvm_proc_fork>:
 280:	00 28 21 0e 80 05 	[MII]       alloc r37=ar.pfs,8,7,0
 286:	40 02 00 62 00 40 	            mov r36=b0
 28c:	04 10 41 00       	            zxt1 r34=r34
 290:	19 70 60 40 01 21 	[MMB]       adds r14=152,r32
 296:	30 c2 84 02 42 00 	            adds r35=152,r33
 29c:	00 00 00 20       	            nop.b 0x0;;
 2a0:	11 30 00 44 87 39 	[MIB]       cmp4.eq p6,p7=0,r34
 2a6:	00 00 00 02 80 03 	            nop.i 0x0
 2ac:	50 00 00 43       	      (p07) br.cond.dpnt.few 2f0 <uvm_proc_fork+0x70>;;
 2b0:	11 38 01 1c 18 10 	[MIB]       ld8 r39=[r14]
 2b6:	00 00 00 02 00 00 	            nop.i 0x0
 2bc:	08 00 00 50       	            br.call.sptk.many b0=2b0 <uvm_proc_fork+0x30>;;
 2c0:	00 00 00 00 01 00 	[MII]       nop.m 0x0
 2c6:	00 28 01 55 00 00 	            mov.i ar.pfs=r37
 2cc:	00 00 04 00       	            nop.i 0x0
 2d0:	09 00 20 46 98 11 	[MMI]       st8 [r35]=r8
 2d6:	00 00 00 02 00 00 	            nop.m 0x0
 2dc:	00 00 04 00       	            nop.i 0x0;;
 2e0:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 2e6:	00 20 05 80 03 80 	            mov b0=r36
 2ec:	08 00 84 00       	            br.ret.sptk.many b0;;
 2f0:	09 18 61 42 01 21 	[MMI]       adds r35=152,r33
 2f6:	00 00 00 02 00 00 	            nop.m 0x0
 2fc:	40 0a 00 07       	            mov b0=r36;;
 300:	09 00 00 46 98 11 	[MMI]       st8 [r35]=r0
 306:	00 00 00 02 00 00 	            nop.m 0x0
 30c:	50 02 aa 00       	            mov.i ar.pfs=r37;;
 310:	11 10 0c 00 80 05 	[MIB]       alloc r2=ar.pfs,3,0,0
 316:	00 00 00 02 00 00 	            nop.i 0x0
 31c:	08 00 00 40       	            br.many 310 <uvm_proc_fork+0x90>;;
 320:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 326:	00 00 00 00 00 00 	            break.f 0x0
 32c:	00 00 04 00       	            nop.i 0x0;;
 330:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 336:	00 00 00 02 00 00 	            nop.m 0x0
 33c:	00 00 04 00       	            nop.i 0x0

0000000000000340 <uvm_lwp_fork>:
 340:	08 38 3d 12 80 05 	[MMI]       alloc r39=ar.pfs,15,9,0
 346:	a0 02 84 00 42 c0 	            mov r42=r33
 34c:	04 00 c4 00       	            mov r38=b0
 350:	09 70 01 4a 00 21 	[MMI]       mov r46=r37
 356:	d0 02 90 00 42 80 	            mov r45=r36
 35c:	05 18 01 84       	            mov r44=r35;;
 360:	08 58 01 44 00 21 	[MMI]       mov r43=r34
 366:	00 00 00 02 00 20 	            nop.m 0x0
 36c:	05 00 01 84       	            mov r41=r32
 370:	19 08 61 42 03 21 	[MMB]       adds r33=408,r33
 376:	00 00 00 02 00 00 	            nop.m 0x0
 37c:	08 00 00 50       	            br.call.sptk.many b0=370 <uvm_lwp_fork+0x30>;;
 380:	00 00 00 00 01 00 	[MII]       nop.m 0x0
 386:	00 38 01 55 00 00 	            mov.i ar.pfs=r39
 38c:	00 00 04 00       	            nop.i 0x0
 390:	09 00 00 42 90 11 	[MMI]       st4 [r33]=r0
 396:	00 00 00 02 00 00 	            nop.m 0x0
 39c:	00 00 04 00       	            nop.i 0x0;;
 3a0:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 3a6:	00 30 05 80 03 80 	            mov b0=r38
 3ac:	08 00 84 00       	            br.ret.sptk.many b0;;
 3b0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 3b6:	00 00 00 02 00 00 	            nop.m 0x0
 3bc:	00 00 04 00       	            nop.i 0x0

00000000000003c0 <uvm_uarea_init>:
 3c0:	08 08 2d 06 80 05 	[MMI]       alloc r33=ar.pfs,11,3,0
 3c6:	c0 80 33 7e 46 00 	            adds r12=-16,r12
 3cc:	04 00 c4 00       	            mov r32=b0
 3d0:	05 00 00 00 01 00 	[MLX]       nop.m 0x0
 3d6:	00 00 00 00 00 00 	            movl r40=0x0;;
 3dc:	05 00 00 60 
 3e0:	08 70 40 18 00 21 	[MMI]       adds r14=16,r12
 3e6:	f0 c0 30 00 42 40 	            adds r15=24,r12
 3ec:	05 00 00 84       	            mov r42=r0
 3f0:	05 48 01 00 00 21 	[MLX]       mov r41=r0
 3f6:	00 00 00 00 00 e0 	            movl r39=0x0;;
 3fc:	04 00 00 60 
 400:	08 40 05 50 00 20 	[MMI]       add r40=r1,r40
 406:	00 00 3c 30 23 e0 	            st8 [r15]=r0
 40c:	14 38 01 80       	            add r39=r1,r39
 410:	09 00 00 1c 98 11 	[MMI]       st8 [r14]=r0
 416:	60 02 00 30 48 a0 	            mov r38=3072
 41c:	04 00 00 84       	            mov r37=r0;;
 420:	11 20 01 00 00 21 	[MIB]       mov r36=r0
 426:	30 02 10 00 48 00 	            mov r35=65536
 42c:	08 00 00 50       	            br.call.sptk.many b0=420 <uvm_uarea_init+0x60>;;
 430:	09 00 00 00 01 00 	[MMI]       nop.m 0x0
 436:	e0 00 04 00 48 00 	            addl r14=0,r1
 43c:	00 00 04 00       	            nop.i 0x0;;
 440:	02 00 20 1c 98 11 	[MII]       st8 [r14]=r8
 446:	00 08 01 55 00 00 	            mov.i ar.pfs=r33;;
 44c:	00 0a 00 07       	            mov b0=r32
 450:	19 00 00 00 01 00 	[MMB]       nop.m 0x0
 456:	c0 80 30 00 42 80 	            adds r12=16,r12
 45c:	08 00 84 00       	            br.ret.sptk.many b0;;
 460:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 466:	00 00 00 02 00 00 	            nop.m 0x0
 46c:	00 00 04 00       	            nop.i 0x0
 470:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 476:	00 00 00 02 00 00 	            nop.m 0x0
 47c:	00 00 04 00       	            nop.i 0x0

0000000000000480 <uvm_uarea_alloc>:
 480:	02 80 0c 06 80 05 	[MII]       alloc r16=ar.pfs,3,3,0
 486:	e0 00 04 00 48 40 	            addl r14=0,r1;;
 48c:	04 00 00 84       	            mov r34=r0
 490:	09 08 05 00 00 24 	[MMI]       mov r33=1
 496:	00 02 38 30 20 00 	            ld8 r32=[r14]
 49c:	00 00 04 00       	            nop.i 0x0;;
 4a0:	11 10 0c 00 80 05 	[MIB]       alloc r2=ar.pfs,3,0,0
 4a6:	00 00 00 02 00 00 	            nop.i 0x0
 4ac:	08 00 00 40       	            br.many 4a0 <uvm_uarea_alloc+0x20>;;
 4b0:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 4b6:	00 00 00 00 00 00 	            break.f 0x0
 4bc:	00 00 04 00       	            nop.i 0x0;;

00000000000004c0 <uvm_uarea_system_alloc>:
 4c0:	02 80 0c 06 80 05 	[MII]       alloc r16=ar.pfs,3,3,0
 4c6:	e0 00 04 00 48 40 	            addl r14=0,r1;;
 4cc:	04 00 00 84       	            mov r34=r0
 4d0:	09 08 05 00 00 24 	[MMI]       mov r33=1
 4d6:	00 02 38 30 20 00 	            ld8 r32=[r14]
 4dc:	00 00 04 00       	            nop.i 0x0;;
 4e0:	11 10 0c 00 80 05 	[MIB]       alloc r2=ar.pfs,3,0,0
 4e6:	00 00 00 02 00 00 	            nop.i 0x0
 4ec:	08 00 00 40       	            br.many 4e0 <uvm_uarea_system_alloc+0x20>;;
 4f0:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 4f6:	00 00 00 00 00 00 	            break.f 0x0
 4fc:	00 00 04 00       	            nop.i 0x0;;

0000000000000500 <uvm_uarea_system_free>:
 500:	09 80 0c 06 80 05 	[MMI]       alloc r16=ar.pfs,3,3,0
 506:	e0 00 04 00 48 20 	            addl r14=0,r1
 50c:	04 00 01 84       	            mov r33=r32;;
 510:	09 10 fd f9 ff 27 	[MMI]       mov r34=-1
 516:	00 02 38 30 20 00 	            ld8 r32=[r14]
 51c:	00 00 04 00       	            nop.i 0x0;;
 520:	11 10 0c 00 80 05 	[MIB]       alloc r2=ar.pfs,3,0,0
 526:	00 00 00 02 00 00 	            nop.i 0x0
 52c:	08 00 00 40       	            br.many 520 <uvm_uarea_system_free+0x20>;;
 530:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 536:	00 00 00 00 00 00 	            break.f 0x0
 53c:	00 00 04 00       	            nop.i 0x0;;

0000000000000540 <uvm_uarea_free>:
 540:	11 10 04 00 80 05 	[MIB]       alloc r2=ar.pfs,1,0,0
 546:	00 00 00 02 00 00 	            nop.i 0x0
 54c:	08 00 00 40       	            br.many 540 <uvm_uarea_free>;;
 550:	0d 00 00 00 01 00 	[MFI]       nop.m 0x0
 556:	00 00 00 00 00 00 	            break.f 0x0
 55c:	00 00 04 00       	            nop.i 0x0;;
 560:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 566:	00 00 00 02 00 00 	            nop.m 0x0
 56c:	00 00 04 00       	            nop.i 0x0
 570:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 576:	00 00 00 02 00 00 	            nop.m 0x0
 57c:	00 00 04 00       	            nop.i 0x0

0000000000000580 <uvm_lwp_getuarea>:
 580:	0b 00 c1 40 00 21 	[MMI]       adds r32=48,r32;;
 586:	20 00 80 30 20 00 	            ld8 r2=[r32]
 58c:	00 00 04 00       	            nop.i 0x0;;
 590:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 596:	80 00 f8 23 4c 80 	            addl r8=-63360,r2
 59c:	08 00 84 00       	            br.ret.sptk.many b0;;
 5a0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 5a6:	00 00 00 02 00 00 	            nop.m 0x0
 5ac:	00 00 04 00       	            nop.i 0x0
 5b0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 5b6:	00 00 00 02 00 00 	            nop.m 0x0
 5bc:	00 00 04 00       	            nop.i 0x0

00000000000005c0 <uvm_lwp_setuarea>:
 5c0:	03 70 00 00 ef 25 	[MII]       mov r14=63360
 5c6:	00 82 81 00 42 20 	            adds r32=48,r32;;
 5cc:	14 72 00 80       	            add r33=r33,r14;;
 5d0:	11 00 84 40 98 11 	[MIB]       st8 [r32]=r33
 5d6:	00 00 00 02 00 80 	            nop.i 0x0
 5dc:	08 00 84 00       	            br.ret.sptk.many b0;;
 5e0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 5e6:	00 00 00 02 00 00 	            nop.m 0x0
 5ec:	00 00 04 00       	            nop.i 0x0
 5f0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 5f6:	00 00 00 02 00 00 	            nop.m 0x0
 5fc:	00 00 04 00       	            nop.i 0x0

0000000000000600 <uvm_proc_exit>:
 600:	18 28 31 0e 80 05 	[MMB]       alloc r37=ar.pfs,12,7,0
 606:	e0 00 04 00 48 00 	            addl r14=0,r1
 60c:	00 00 00 20       	            nop.b 0x0
 610:	09 18 61 40 01 21 	[MMI]       adds r35=152,r32
 616:	00 00 00 02 00 80 	            nop.m 0x0
 61c:	04 00 c4 00       	            mov r36=b0;;
 620:	0b 70 00 1c 18 10 	[MMI]       ld8 r14=[r14];;
 626:	e0 00 3a 06 42 00 	            adds r14=448,r14
 62c:	00 00 04 00       	            nop.i 0x0;;
 630:	0b 10 01 1c 18 10 	[MMI]       ld8 r34=[r14];;
 636:	e0 80 8a 06 42 00 	            adds r14=464,r34
 63c:	00 00 04 00       	            nop.i 0x0;;
 640:	0b 70 00 1c 18 10 	[MMI]       ld8 r14=[r14];;
 646:	60 00 39 0e 70 00 	            cmp.eq p6,p7=r32,r14
 64c:	00 00 04 00       	            nop.i 0x0;;
 650:	04 00 00 00 01 00 	[MLX]       nop.m 0x0
 656:	00 00 00 00 80 e3 	      (p07) movl r39=0x0
 65c:	04 00 00 60 
 660:	e5 58 a9 00 03 24 	[MLX] (p07) mov r43=426
 666:	00 00 00 00 80 43 	      (p07) movl r42=0x0;;
 66c:	05 00 00 60 
 670:	04 00 00 00 01 00 	[MLX]       nop.m 0x0
 676:	00 00 00 00 80 23 	      (p07) movl r41=0x0
 67c:	05 00 00 60 
 680:	e5 38 05 4e 00 20 	[MLX] (p07) add r39=r1,r39
 686:	00 00 00 00 80 03 	      (p07) movl r40=0x0;;
 68c:	05 00 00 60 
 690:	e8 50 05 54 00 20 	[MMI] (p07) add r42=r1,r42
 696:	00 00 00 02 80 23 	            nop.m 0x0
 69c:	15 48 01 80       	      (p07) add r41=r1,r41
 6a0:	f9 40 05 50 00 20 	[MMB] (p07) add r40=r1,r40
 6a6:	00 00 00 02 80 03 	            nop.m 0x0
 6ac:	08 00 00 53       	      (p07) br.call.dpnt.many b0=6a0 <uvm_proc_exit+0xa0>;;
 6b0:	0b 00 01 46 18 10 	[MMI]       ld8 r32=[r35];;
 6b6:	70 00 80 0c 72 00 	            cmp.eq p7,p6=0,r32
 6bc:	00 00 04 00       	            nop.i 0x0;;
 6c0:	04 00 00 00 01 00 	[MLX]       nop.m 0x0
 6c6:	00 00 00 00 80 e3 	      (p07) movl r39=0x0
 6cc:	04 00 00 60 
 6d0:	e5 58 b1 00 03 24 	[MLX] (p07) mov r43=428
 6d6:	00 00 00 00 80 43 	      (p07) movl r42=0x0;;
 6dc:	05 00 00 60 
 6e0:	04 00 00 00 01 00 	[MLX]       nop.m 0x0
 6e6:	00 00 00 00 80 23 	      (p07) movl r41=0x0
 6ec:	05 00 00 60 
 6f0:	e5 38 05 4e 00 20 	[MLX] (p07) add r39=r1,r39
 6f6:	00 00 00 00 80 03 	      (p07) movl r40=0x0;;
 6fc:	05 00 00 60 
 700:	e8 50 05 54 00 20 	[MMI] (p07) add r42=r1,r42
 706:	00 00 00 02 80 23 	            nop.m 0x0
 70c:	15 48 01 80       	      (p07) add r41=r1,r41
 710:	f9 40 05 50 00 20 	[MMB] (p07) add r40=r1,r40
 716:	00 00 00 02 80 03 	            nop.m 0x0
 71c:	08 00 00 53       	      (p07) br.call.dpnt.many b0=710 <uvm_proc_exit+0x110>;;
 720:	0b 08 01 02 00 24 	[MMI]       addl r33=0,r1;;
 726:	10 02 84 30 20 00 	            ld8 r33=[r33]
 72c:	00 00 04 00       	            nop.i 0x0;;
 730:	0b 08 61 42 01 21 	[MMI]       adds r33=152,r33;;
 736:	e0 00 84 30 20 00 	            ld8 r14=[r33]
 73c:	00 00 04 00       	            nop.i 0x0;;
 740:	11 30 38 40 07 38 	[MIB]       cmp.eq p6,p7=r14,r32
 746:	00 00 00 02 00 03 	            nop.i 0x0
 74c:	80 00 00 43       	      (p06) br.cond.dpnt.few 7c0 <uvm_proc_exit+0x1c0>;;
 750:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 756:	00 00 00 02 00 00 	            nop.i 0x0
 75c:	08 00 00 50       	            br.call.sptk.many b0=750 <uvm_proc_exit+0x150>;;
 760:	11 38 01 44 00 21 	[MIB]       mov r39=r34
 766:	00 00 00 02 00 00 	            nop.i 0x0
 76c:	08 00 00 50       	            br.call.sptk.many b0=760 <uvm_proc_exit+0x160>;;
 770:	09 70 00 42 18 10 	[MMI]       ld8 r14=[r33]
 776:	00 00 00 02 00 e0 	            nop.m 0x0
 77c:	04 10 01 84       	            mov r39=r34;;
 780:	11 00 38 46 98 11 	[MIB]       st8 [r35]=r14
 786:	00 00 00 02 00 00 	            nop.i 0x0
 78c:	08 00 00 50       	            br.call.sptk.many b0=780 <uvm_proc_exit+0x180>;;
 790:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 796:	00 00 00 02 00 00 	            nop.i 0x0
 79c:	08 00 00 50       	            br.call.sptk.many b0=790 <uvm_proc_exit+0x190>;;
 7a0:	03 00 00 00 01 00 	[MII]       nop.m 0x0
 7a6:	00 20 05 80 03 00 	            mov b0=r36;;
 7ac:	50 02 aa 00       	            mov.i ar.pfs=r37;;
 7b0:	10 10 04 00 80 05 	[MIB]       alloc r2=ar.pfs,1,0,0
 7b6:	00 00 00 02 00 00 	            nop.i 0x0
 7bc:	08 00 00 40       	            br.many 7b0 <uvm_proc_exit+0x1b0>
 7c0:	01 00 00 00 01 00 	[MII]       nop.m 0x0
 7c6:	00 28 01 55 00 00 	            mov.i ar.pfs=r37
 7cc:	00 00 04 00       	            nop.i 0x0;;
 7d0:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 7d6:	00 20 05 80 03 80 	            mov b0=r36
 7dc:	08 00 84 00       	            br.ret.sptk.many b0;;
 7e0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 7e6:	00 00 00 02 00 00 	            nop.m 0x0
 7ec:	00 00 04 00       	            nop.i 0x0
 7f0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 7f6:	00 00 00 02 00 00 	            nop.m 0x0
 7fc:	00 00 04 00       	            nop.i 0x0

0000000000000800 <uvm_lwp_exit>:
 800:	18 10 1d 08 80 05 	[MMB]       alloc r34=ar.pfs,7,4,0
 806:	00 82 81 00 42 00 	            adds r32=48,r32
 80c:	00 00 00 20       	            nop.b 0x0
 810:	09 70 00 02 00 24 	[MMI]       addl r14=0,r1
 816:	00 00 00 02 00 20 	            nop.m 0x0
 81c:	04 00 c4 00       	            mov r33=b0;;
 820:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 826:	20 00 80 30 20 c0 	            ld8 r2=[r32]
 82c:	f4 e7 ff 9f       	            mov r38=-1
 830:	09 00 00 00 01 00 	[MMI]       nop.m 0x0
 836:	40 02 38 30 20 00 	            ld8 r36=[r14]
 83c:	00 00 04 00       	            nop.i 0x0;;
 840:	11 28 01 fc 11 26 	[MIB]       addl r37=-63360,r2
 846:	00 00 00 02 00 00 	            nop.i 0x0
 84c:	08 00 00 50       	            br.call.sptk.many b0=840 <uvm_lwp_exit+0x40>;;
 850:	09 70 00 00 ef 25 	[MMI]       mov r14=63360
 856:	00 00 00 02 00 00 	            nop.m 0x0
 85c:	20 02 aa 00       	            mov.i ar.pfs=r34;;
 860:	11 00 38 40 98 11 	[MIB]       st8 [r32]=r14
 866:	00 08 05 80 03 80 	            mov b0=r33
 86c:	08 00 84 00       	            br.ret.sptk.many b0;;
 870:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 876:	00 00 00 02 00 00 	            nop.m 0x0
 87c:	00 00 04 00       	            nop.i 0x0

0000000000000880 <uvm_init_limits>:
 880:	04 78 00 02 00 e4 	[MLX]       addl r15=0,r1
 886:	ff ff ff ff 7f 20 	            movl r17=0x7fffffffffffffff
 88c:	f2 f7 ff 67 
 890:	05 00 41 40 01 21 	[MLX]       adds r32=144,r32
 896:	00 00 00 00 20 00 	            movl r16=0xa000000000004000;;
 89c:	02 00 00 6a 
 8a0:	09 78 00 1e 18 10 	[MMI]       ld8 r15=[r15]
 8a6:	e0 00 80 30 20 00 	            ld8 r14=[r32]
 8ac:	00 00 04 00       	            nop.i 0x0;;
 8b0:	0b 70 c0 1c 00 21 	[MMI]       adds r14=48,r14;;
 8b6:	30 01 3c 30 20 e0 	            ld8 r19=[r15]
 8bc:	01 08 00 90       	            addl r15=0,r1;;
 8c0:	09 00 00 00 01 00 	[MMI]       nop.m 0x0
 8c6:	f0 00 3c 30 20 00 	            ld8 r15=[r15]
 8cc:	00 00 04 00       	            nop.i 0x0;;
 8d0:	05 90 00 1e 18 10 	[MLX]       ld8 r18=[r15]
 8d6:	00 00 00 00 00 e0 	            movl r15=0x200000;;
 8dc:	01 10 00 60 
 8e0:	09 00 3c 1c 98 11 	[MMI]       st8 [r14]=r15
 8e6:	00 00 00 02 00 c0 	            nop.m 0x0
 8ec:	01 08 00 90       	            addl r14=0,r1;;
 8f0:	09 78 00 40 18 10 	[MMI]       ld8 r15=[r32]
 8f6:	e0 00 38 30 20 00 	            ld8 r14=[r14]
 8fc:	00 00 04 00       	            nop.i 0x0;;
 900:	09 78 e0 1e 00 21 	[MMI]       adds r15=56,r15
 906:	00 00 00 02 00 c0 	            nop.m 0x0
 90c:	01 71 00 84       	            adds r14=16,r14;;
 910:	04 00 4c 1e 98 11 	[MLX]       st8 [r15]=r19
 916:	08 00 00 00 00 60 	            movl r19=0x8000000
 91c:	02 00 00 60 
 920:	0b 70 00 1c 10 10 	[MMI]       ld4 r14=[r14];;
 926:	f0 00 80 30 20 c0 	            ld8 r15=[r32]
 92c:	01 70 58 00       	            sxt4 r14=r14;;
 930:	09 78 80 1e 00 21 	[MMI]       adds r15=32,r15
 936:	00 00 00 02 00 c0 	            nop.m 0x0
 93c:	e1 88 c5 53       	            shl r14=r14,14;;
 940:	09 00 4c 1e 98 11 	[MMI]       st8 [r15]=r19
 946:	00 00 00 02 00 e0 	            nop.m 0x0
 94c:	e0 80 18 d0       	            cmp.ltu p7,p6=r14,r16;;
 950:	0b 78 00 40 18 10 	[MMI]       ld8 r15=[r32];;
 956:	f0 40 3d 00 42 00 	            adds r15=40,r15
 95c:	00 00 04 00       	            nop.i 0x0;;
 960:	0b 00 48 1e 98 11 	[MMI]       st8 [r15]=r18;;
 966:	f0 00 80 30 20 00 	            ld8 r15=[r32]
 96c:	00 00 04 00       	            nop.i 0x0;;
 970:	0b 78 80 1e 01 21 	[MMI]       adds r15=160,r15;;
 976:	00 88 3c 30 23 00 	            st8 [r15]=r17
 97c:	00 00 04 00       	            nop.i 0x0;;
 980:	0b 78 00 40 18 10 	[MMI]       ld8 r15=[r32];;
 986:	f0 40 3d 02 42 00 	            adds r15=168,r15
 98c:	00 00 04 00       	            nop.i 0x0;;
 990:	0b 00 44 1e 98 11 	[MMI]       st8 [r15]=r17;;
 996:	f0 00 80 30 20 00 	            ld8 r15=[r32]
 99c:	00 00 04 00       	            nop.i 0x0;;
 9a0:	02 78 40 1f 00 21 	[MII]       adds r15=80,r15
 9a6:	00 00 00 02 00 00 	            nop.i 0x0;;
 9ac:	00 00 04 00       	            nop.i 0x0
 9b0:	d9 00 40 1e 98 d1 	[MMB] (p06) st8 [r15]=r16
 9b6:	01 70 3c 30 23 80 	      (p07) st8 [r15]=r14
 9bc:	08 00 84 00       	            br.ret.sptk.many b0;;

00000000000009c0 <uvm_scheduler>:
 9c0:	09 20 29 0c 80 05 	[MMI]       alloc r36=ar.pfs,10,6,0
 9c6:	e0 00 04 00 48 60 	            addl r14=0,r1
 9cc:	04 00 c4 00       	            mov r35=b0;;
 9d0:	0b 70 00 1c 18 10 	[MMI]       ld8 r14=[r14];;
 9d6:	e0 00 3a 06 42 00 	            adds r14=448,r14
 9dc:	00 00 04 00       	            nop.i 0x0;;
 9e0:	03 08 01 1c 18 10 	[MII]       ld8 r33=[r14]
 9e6:	00 00 00 02 00 40 	            nop.i 0x0;;
 9ec:	04 0a 01 84       	            adds r34=32,r33;;
 9f0:	09 00 00 00 01 00 	[MMI]       nop.m 0x0
 9f6:	00 02 88 70 21 00 	            ld8.acq r32=[r34]
 9fc:	00 00 04 00       	            nop.i 0x0;;
 a00:	11 30 01 40 00 21 	[MIB]       mov r38=r32
 a06:	00 00 00 02 00 00 	            nop.i 0x0
 a0c:	08 00 00 50       	            br.call.sptk.many b0=a00 <uvm_scheduler+0x40>;;
 a10:	09 70 00 44 b8 10 	[MMI]       ld8.acq r14=[r34]
 a16:	f0 00 04 00 48 00 	            addl r15=0,r1
 a1c:	c2 0a 05 84       	            adds r16=172,r33;;
 a20:	11 38 38 40 06 38 	[MIB]       cmp.eq p7,p6=r14,r32
 a26:	e0 00 85 02 42 03 	            adds r14=160,r33
 a2c:	f0 00 00 43       	      (p06) br.cond.dpnt.few b10 <uvm_scheduler+0x150>;;
 a30:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 a36:	f0 00 3c 30 20 20 	            ld8 r15=[r15]
 a3c:	04 08 00 90       	            addl r33=0,r1
 a40:	05 00 00 00 01 00 	[MLX]       nop.m 0x0
 a46:	00 00 00 00 00 00 	            movl r32=0x0;;
 a4c:	04 00 00 60 
 a50:	09 08 01 42 18 10 	[MMI]       ld8 r33=[r33]
 a56:	00 00 00 02 00 00 	            nop.m 0x0
 a5c:	14 00 01 80       	            add r32=r1,r32;;
 a60:	0b 78 00 1e 10 10 	[MMI]       ld4 r15=[r15];;
 a66:	f0 78 00 20 40 00 	            shladd r15=r15,1,r0
 a6c:	00 00 04 00       	            nop.i 0x0;;
 a70:	0b 78 fc 1f 25 20 	[MMI]       sub r15=127,r15;;
 a76:	00 78 40 20 23 e0 	            st4 [r16]=r15
 a7c:	11 00 00 90       	            mov r15=1;;
 a80:	09 00 00 00 01 00 	[MMI]       nop.m 0x0
 a86:	00 78 38 20 23 00 	            st4 [r14]=r15
 a8c:	00 00 04 00       	            nop.i 0x0;;
 a90:	11 30 01 44 b8 10 	[MIB]       ld8.acq r38=[r34]
 a96:	00 00 00 02 00 00 	            nop.i 0x0
 a9c:	08 00 00 50       	            br.call.sptk.many b0=a90 <uvm_scheduler+0xd0>;;
 aa0:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 aa6:	00 00 00 02 00 00 	            nop.i 0x0
 aac:	08 00 00 50       	            br.call.sptk.many b0=aa0 <uvm_scheduler+0xe0>;;
 ab0:	08 00 00 00 01 00 	[MMI]       nop.m 0x0
 ab6:	80 02 84 20 20 c0 	            ld4 r40=[r33]
 abc:	04 00 01 84       	            mov r38=r32
 ac0:	19 48 01 00 00 21 	[MMB]       mov r41=r0
 ac6:	70 02 00 00 42 00 	            mov r39=r0
 acc:	08 00 00 50       	            br.call.sptk.many b0=ac0 <uvm_scheduler+0x100>;;
 ad0:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 ad6:	00 00 00 02 00 00 	            nop.i 0x0
 adc:	08 00 00 50       	            br.call.sptk.many b0=ad0 <uvm_scheduler+0x110>;;
 ae0:	08 48 01 00 00 21 	[MMI]       mov r41=r0
 ae6:	80 02 84 20 20 00 	            ld4 r40=[r33]
 aec:	00 00 04 00       	            nop.i 0x0
 af0:	19 38 01 00 00 21 	[MMB]       mov r39=r0
 af6:	60 02 80 00 42 00 	            mov r38=r32
 afc:	08 00 00 50       	            br.call.sptk.many b0=af0 <uvm_scheduler+0x130>;;
 b00:	10 00 00 00 01 00 	[MIB]       nop.m 0x0
 b06:	00 00 00 02 00 00 	            nop.i 0x0
 b0c:	a0 ff ff 48       	            br.few aa0 <uvm_scheduler+0xe0>
 b10:	11 30 01 40 00 21 	[MIB]       mov r38=r32
 b16:	00 00 00 02 00 00 	            nop.i 0x0
 b1c:	08 00 00 50       	            br.call.sptk.many b0=b10 <uvm_scheduler+0x150>;;
 b20:	11 00 00 00 01 00 	[MIB]       nop.m 0x0
 b26:	00 00 00 02 00 00 	            nop.i 0x0
 b2c:	d0 fe ff 48       	            br.few 9f0 <uvm_scheduler+0x30>;;

Disassembly of section .data:

0000000000000000 <uvm_uarea_allocator>:
	...
  10:	00 00 01 00 00 00 	[MII]       break.m 0x20
	...

Disassembly of section .ident:

0000000000000000 <.ident>:
   0:	24 4e 65 74 42 53 	[MLX] (p49) ld1.c.clr.acq.nt1 r41=[r58],r25
   6:	44 3a 20 75 76 6d 	            data8 0xead8cebeda
   c:	5f 67 6c 75 
  10:	65 2e 63 2c 76 20 	[MLX]       data8 0x103b1631973
  16:	31 2e 31 36 36 20 	            data8 0x7062606440
  1c:	32 30 31 38 
  20:	2f 31 32 2f 32 33 	[MMF] (p09) cmp.lt.unc p6,p50=-52,r23
  26:	20 31 32 3a 31 35 	            data8 0xc4e8c8c480
  2c:	3a 30 31 20       	            data8 0x406260746a
  30:	Address 0x0000000000000030 is out of bounds.


Disassembly of section .IA_64.unwind_info:

0000000000000000 <.IA_64.unwind_info>:
   0:	01 00 00 00 00 00 	[MII]       break.m 0x0
   6:	01 00 01 2b c0 00 	            data8 0x100ac040004
   c:	06 00 00 00       	      (p01) break.i 0x30;;
  10:	01 00 00 00 00 00 	[MII]       break.m 0x0
  16:	01 00 01 31 c0 00 	      (p04) shladdp4 r0=r32,1,r64
  1c:	06 00 00 00       	      (p01) break.i 0x30;;
  20:	01 00 00 00 00 00 	[MII]       break.m 0x0
  26:	01 00 46 25 03 e6 	            data8 0xc95180004
  2c:	00 e4 02 3b       	            data8 0x7605c801cc
  30:	01 00 00 00 00 00 	[MII]       break.m 0x0
  36:	01 00 01 28 c0 00 	            data8 0x100a0040004
  3c:	06 00 00 00       	      (p01) break.i 0x30;;
  40:	01 00 00 00 00 00 	[MII]       break.m 0x0
  46:	01 00 00 26 c0 00 	      (p04) shladd r0=r0,4,r0
  4c:	06 00 00 00       	      (p01) break.i 0x30;;
  50:	02 00 00 00 00 00 	[MII]       break.m 0x0
  56:	01 00 46 24 02 e6 	            data8 0x891180004
  5c:	00 e4 01 39       	            data8 0x7203c801cc
  60:	c0 00 06 00 00 00 	[MII] (p06) break.m 0xc0
  66:	00 00 01 00 00 00 	            break.i 0x1000
  6c:	00 00 01 00       	            break.i 0x80000
  70:	46 26 03 e6 00 e4 	[-3-]       data8 0x12007301932
  76:	02 32 02 00 00 00 	            data8 0x00008c80b
  7c:	00 00 01 00       	            data8 0x002000000
  80:	46 20 03 e6 00 e0 	[-3-]       data8 0x10007301902
  86:	01 01 e4 02 3b c0 	            data8 0xec0b900407
  8c:	01 00 00 00       	            data8 0x000000380
  90:	01 00 00 00 00 00 	[MII]       break.m 0x0
  96:	01 00 01 25 c0 00 	      (p04) shladd r0=r32,3,r64
  9c:	06 00 00 00       	      (p01) break.i 0x30;;
  a0:	01 00 00 00 00 00 	[MII]       break.m 0x0
  a6:	01 00 01 25 c0 00 	      (p04) shladd r0=r32,3,r64
  ac:	06 00 00 00       	      (p01) break.i 0x30;;
  b0:	01 00 00 00 00 00 	[MII]       break.m 0x0
  b6:	01 00 01 25 c0 00 	      (p04) shladd r0=r32,3,r64
  bc:	06 00 00 00       	      (p01) break.i 0x30;;
  c0:	01 00 00 00 00 00 	[MII]       break.m 0x0
  c6:	01 00 00 20 c0 00 	      (p04) shladd r0=r0,1,r0
  cc:	06 00 00 00       	      (p01) break.i 0x30;;
  d0:	02 00 00 00 00 00 	[MII]       break.m 0x0
  d6:	01 00 46 24 06 e6 	            data8 0x1891180004
  dc:	00 e4 05 61       	            data8 0xc20bc801cc
  e0:	4b 81 c0 00 03 26 	[MMI] (p10) mov r16=-2096720;;
  e6:	a1 00 01 00 00 00 	      (p04) break.m 0x100a
  ec:	00 00 01 00       	            break.i 0x80000;;
  f0:	46 21 06 e6 00 e4 	[-3-]       data8 0x1200730310a
  f6:	05 2f 02 00 00 00 	            data8 0x00008bc17
  fc:	00 00 01 00       	            data8 0x002000000
 100:	46 23 03 e6 00 e4 	[-3-]       data8 0x1200730191a
 106:	02 61 42 00 00 00 	            data8 0x00109840b
 10c:	00 00 00 00       	            data8 00000000000

Disassembly of section .IA_64.unwind:

0000000000000000 <.IA_64.unwind>:
	...

Disassembly of section .rodata.str1.8:

0000000000000000 <.rodata.str1.8>:
   0:	75 61 72 65 61 00 	[-a-]       data8 0x30b2b930b
   6:	00 00 2f 68 6f 6d 	            data8 0x1bda0bc0000
   c:	65 2f 73 63       	            data8 0xc6e65ecada
  10:	6f 6c 65 2f 6e 62 	[MMF]       data8 0x113717b2b63
  16:	73 64 2f 63 76 73 	      (p13) cmp.eq.unc p7,p49=-20,r75
  1c:	2f 73 72 63       	            data8 0xc6e4e65ee6
  20:	2f 73 79 73 2f 75 	[MMF] (p25) cmp.ltu p46,p47=94,r57
  26:	76 6d 2f 75 76 6d 	      (p25) cmp.eq.unc p23,p58=-19,r75
  2c:	5f 67 6c 75       	            data8 0xead8cebeda
  30:	65 2e 63 00 00 00 	[MLX] (p51) break.m 0xc65
  36:	00 00 70 20 3d 3d 	            data8 0x7c5ad8407a
  3c:	20 6c 2d 3e 
  40:	6c 5f 70 72 6f 63 	[MFI]       data8 0x11b7b9382fb
  46:	00 00 64 69 61 67 	      (p01) fnmpy.s1 f0=f89,f52
  4c:	6e 6f 73 74       	            data8 0xe8e6dedcce
  50:	69 63 20 00 00 00 	[MMI] (p27) break.m 0x40c
  56:	00 00 6b 65 72 6e 	            cmp.eq p0,p50=96,r90
  5c:	65 6c 20 25       	            data8 0x4a40d8cadc
  60:	73 61 73 73 65 72 	[MBB] (p11) cmp.lt.and p44,p37=r0,r57
  66:	74 69 6f 6e 20 22 	            br.ctop.sptk.few dcdf30 <uvm_scheduler+0xdcd570>
  6c:	25 73 22 20       	            data8 0x4044e64a44
  70:	66 61 69 6c 65 64 	[-3-]       data8 0x1232b634b0b
  76:	3a 20 66 69 6c 65 	            data8 0x1b1a59880e9
  7c:	20 22 25 73       	            data8 0xe64a4440ca
  80:	22 2c 20 6c 69 6e 	[MII]       data8 0x1734b610161
  86:	65 20 25 64 20 00 	      (p21) dep r6=r36,r9,60,3;;
  8c:	00 00 00 00       	            break.i 0x0
  90:	6f 76 6d 20 21 3d 	[MMF]       data8 0x1e909036bb3
  96:	20 4e 55 4c 4c 00 	            addl r98=-1764567,r1
  9c:	00 00 00 00       	            break.f 0x0;;
  a0:	Address 0x00000000000000a0 is out of bounds.


Disassembly of section .sbss:

0000000000000000 <uvm_uarea_cache>:
   0:	Address 0x0000000000000000 is out of bounds.


Disassembly of section .comment:

0000000000000000 <.comment>:
   0:	00 47 43 43 3a 20 	[MII]       data8 0x101d21a1a38
   6:	28 4e 65 74 42 53 	      (p32) adds r98=7465,r25
   c:	44 20 6e 62       	            data8 0xc4dc4088a6
  10:	34 20 32 30 31 38 	[-a-]       data8 0x1c189819101
  16:	31 31 30 39 29 20 	            data8 0xa4e4c0c4c4
  1c:	36 2e 35 2e       	            data8 0x5c6a5c6c40
  20:	Address 0x0000000000000020 is out of bounds.